PAINE 2026: IEEE International Conference on Physical Assurance and Inspection of Electronics Hyatt Phoenix, AZ, United States, October 27-29, 2026 |
| Conference website | http://paine-conference.org/ |
| Submission link | https://easychair.org/conferences/?conf=paine2026 |
| Submission deadline | July 20, 2026 |
Dear colleagues,
This is to inform you that the “IEEE International Conference on Physical Assurance and Inspection on Electronics” (PAINE), is to be held “in-person” from October 27-29, 2026 in Phoenix, AZ. PAINE is supported by the “IEEE” and accepted papers will be published in IEEE Xplore after peer review by the PAINE TPC.
PAINE offers an exciting venue to researchers and practitioners in the field of Hardware Security and Trust who research and develop physical assurance and analysis. PAINE brings together experts from government, instrumentation, original component manufacturers (OCMs), original equipment manufacturers (OEMs), and academic researchers together to share ideas and solutions to make electronic devices and systems safe and secure.
Topics covered are including but are not limited to:
- New metrologies for characterization and assurance
- Secure Heterogeneous Integration and Advanced Packaging
- Role of LLMs in Physical Assurance and Inspection
- Emerging topics in physical inspection and assurance
- Test vehicles and performance quantification
- Multi-modal Analysis
- Automated inspection and metrology for advanced packaging
- Additive manufacturing assurance for electronics
- Image analysis & artificial intelligence for assurance and inspection
- RadHard design and assessment
- Novel material and devices for assurance
- Forensic Analysis
- Sample Preparation for advanced node devices
- PCB trust and assurance
- Chip and PCB level decomposition for assurance
- Side channel assessment for assurance and countermeasures
- FIB/SEM for assurance
- Electro-optical probing using PEM, EOP, EOFM, etc.
- Physical/side channel fingerprinting
- Mod-chip on PCB
- Micro probing and nanoprobing
- Physical and design interface assurance
- Fault injection assessment and countermeasures
- Field-based weakness
- Countermeasures against tampering and decomposition
- Physical/logical shielding, etc.
- FPGA Bitstream protection and vulnerabilities
- Analog & mixed-signal circuits and systems security
- Security primitives: Novel devices, materials, and systems
- Trojans and backdoors: Detection and prevention
- Counterfeit Detection and Anti-Counterfeit Technique
- Inspection Structures for Assurance
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SCHEDULE (EXTENDED DEADLINE) Full Paper (4-7 pages): July 20, 2026 Notification of Acceptance: August 17, 2026 Camera-ready version: September 7, 2026 |
CONTACT INFORMATION
Navid Asadi (Co-General Chair)University of FloridaE-mail: nasadi [at] ece [dot] ufl [dot] edu
William Zortman (C0-General Chair) Sandia National Lab
Antara Nandi (Co-Program Chair) NIST
Adam Kimura (Co-Program Chair) Battelle
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Best Regards,
PAINE Organizing Committee
